It is important that electronic components and printed circuit boards be tested after the components have been soldered to the printed circuit boards. Several different approaches have been developed for testing the components and printed circuit boards, including in-circuit testing, manufacturing defect analyzers, and functional testing.
In-circuit testing techniques have been used to individually test the components on the printed circuit board to determine if these components are working properly. This process uses a "bed of nails" tester to access each individual component and test that component independently. In this manner, non-functioning components can be identified and replaced to prevent the entire circuit board from being scrapped. This process works well for simple components where the circuit inside the component is known and can be easily tested. If the component being tested is very complex, or if the circuit inside the component is unknown, in-circuit testing may not achieve satisfactory results.
Manufacturing defect analyzers are another class of testing devices that provide simpler tests and are less expensive to implement. These devices are designed to locate manufacturing faults, such as shorts on a printed circuit board, missing integrated circuits, bent component pins, etc. Although these devices do a reasonably good job of finding shorts and gross analog faults, they are marginal when testing digital sections of the board.
Functional testing uses a procedure of applying predetermined input signals and monitoring the output of a printed circuit board to determine if all of the components are present and operating properly on the circuit board. A stored pattern functional tester is one that applies a digital stimulus to the input pins of the device under test (DUT), waits a predetermined amount of time, then examines the state of the DUT output pins. This architecture was well suited to the early needs of digital board testing, since most of the early DUT's were composed of discrete SSI logic gates and performed simple combinatorial or state machine functions. Because of the simplicity of the DUTs being tested, the tester architecture was a good match to the DUT.
With the introduction of the microprocessor, DUTs having a bus structured architecture became common. Various test enhancements came about in an attempt to make tests for these boards easier to write: memory emulation, bus emulation, and microprocessor emulation, for example. The goal of each of these enhancements was to remove from the test programmer the burden of dealing with the DUT in its low-level, native environment.
DUTs now have faster and more powerful microprocessors, multiprocessing technology, serial communications channels, mixed signal functions, and a variety of custom circuitry such as application specific integrated circuits (ASICs). These technologies tax the capability of a single sequencer, stored pattern test architecture; that is, the tester architecture is no longer a good match to the architecture of the device under test.
We are in the midst of a communications explosion. Local area networks (LANs), wide area networks (WANs), public packet switch networks (PPSNs), and now integrated services digital networks (ISDNs), are being implemented on a large scale in an attempt to keep pace with the communications needs of the world. The design of these networks revolves heavily around serial communications channels and the process of transmitting information through these channels. There are also more specialized types of serial communications applications, such as disk drives, automotive control systems, and aircraft control systems. Today's board testers have trouble with many of the elements of the serial communications technology. For example, the signals within telecommunications can assume not just two states, but sometimes three or four logic states or levels. The serial bit streams are often self-clocking and the clock must be recovered from the bit stream and used to demarcate data bit boundaries. Communications channels may be bit multiplexed, wherein bits that are logically associated with one another are separated in time by bits of other channels. Bits from each channel must be reassembled into a coherent, meaningful flow of information before testing can be performed.
A DUT in this type of system will often have several serial communications channels on a single board. These channels are not only separate physical interfaces, but are functionally separate as well, wherein each channel is controlled by an associated process running on the DUT. These processes may be controlled by a common microprocessor, separate microprocessors, algorithmic state machines or special VLSI parts. From the view of the external world, each channel appears as an independent, selfcontained communications channel. A single sequencer, stored pattern tester architecture has great difficulty testing a DUT having several separate channels and processes running asynchronously.
Boards may also be designed with several identical channels that perform the same processing. In order to efficiently test such a board in a timely manner, all channels need to be exercised in parallel. A signal sequencer architecture has great difficulty with testing a plurality of parallel identical processes.
Many standards have been developed in serial communications, for example RS/232, IEEE 802.3 Ethernet, ISDN, etc. General purpose testers must be reprogrammed to deal with each of these standards, since they do not have built-in test capability for these standards.
There is need in the art then for a test system that is capable of testing serial cards having a plurality of channels each of which may be controlled by a different process. There is further need in the art for a tester capable of testing a board having a plurality of identical channels, wherein all channels can be tested in parallel. Another need in the art is to provide such a system with built-in testing capability for commonly used serial communication protocols. The present invention satisfies these and other needs in the art.